There are complex emerging digital products that require the storage and retrieval of digital audio and video content. The key technology driving the emergence of such new digital products is the use of local digital storage and retrieval devices, particularly the low-cost hard disk drive (HDD). The HDD allows robust, cost-effective and reliable storage of digital content with the major benefit of providing “non-linear” random access to digital content. This allows users to randomly select digital content, such as video, for playback without the burden of linear searching, such as in the case of a Video Cassette Recorder (VCR).
Current digital products largely utilize Digital Computer architectures, typically referred to as Personal Computer (PC) architectures, employing HDD's to varying degrees for designing complex digital products, such as the Personal Video Recorder (PVR). PC architectures were originally designed as general purpose tools with rigid hardware requirements, but flexible software environments, that can accommodate sometimes very complex, demanding applications. The HDD was originally developed to support PC architectural requirements, so it is no surprise that PC architectures are usually used in digital product designs incorporating HDD's. Today, there are very few architectural design alternatives to PC architectures that can accommodate the incorporation of HDD's into digital devices for inherently complex applications, such as in the case of the PVR, without necessarily including the architectural specifications of the PC.
Typically, digital signal data is uniformly subjected to a generic signal translation process to provide interoperability with the multiple layers of processing that are inherent to the design architecture of the present technology, such as the PCI Bus protocol layer; the hardware layer; Operating System layer; BIOS layer; and the Application layer. This requisite translation process of the present technology is computation intensive and unnecessarily complex for creating digital appliances, which typically embody narrowly defined operational parameters that do not require interoperability with a vast majority of the layers of processing embodied by the present technology. Generic digital signal translation processing conducted by the present technology cannot restrict or vet out superfluous or unnecessary digital signal translation processing for the purposes of simple storage and retrieval of digital signal data. Such generic digital signal processing is never optimized to the specific requirements of the application or the digital storage medium utilized without additional application layers to facilitate such supplemental digital signal processing.
Today's digital product designs based on PC architectures are overly complex. This design approach is complex because the digital signal data format that is to be stored and retrieved must comply with rigid PC architectural hardware and software requirements regardless of application requirements. For example, in a video streaming application that does no supplemental processing of the digital signal other than to stream the signal from one digital device to another, a PC architectural design would necessarily involve that digital signal to be translated to support operating system (OS) compliance; PCI Bus/Hardware compliance; BIOS compliance and compliance with any application. This inherent architectural complexity illustrates the limited utility of general purpose PC architectures in applications requiring specialized data handling.
Additionally, today's digital product designs based on PC architectures are inefficient and processor intensive. For example, a HDD utilizing an industry standard file system (typically FAT32) would be required to simply store and retrieve digital signal video data. This is a processor intensive design approach due to the fact that such PC architectures must analyze the digital signal data as it searches its File Allocation Tables (FAT) for available storage—and more importantly because it is processed unidirectionally (from the top down). This leads to extremely large processing tasks involving a very large number of data entries in the FAT due to the traditionally small size (typically 32 KB) of the digital storage units (sectors) utilized by the FAT32 file system. Such small sector sizes are inefficient for video applications which are very large files, typically well in excess of 1 MB. This inefficient correlation between the unique characteristics of digital signal data and the rigidity of traditional PC file systems is symptomatic of the limitations of PC architectures and a significant contributor to the proliferation of data errors.
Further still, today's digital products utilizing PC architectures are inherently unreliable. For example in the case of PVR applications, all digital signal data must be analyzed and arbitrated. Consequently, as the processing demands placed upon typical PC architectures rapidly increase, the level of relative instability would increase proportionally. This is due to the increased processing requirements to track data errors. Design solutions for this phenomenon are usually addressed with yet more PC circuitry, more powerful microprocessors and additional specialized application layers. System costs escalate as a result and system reliability decreases in direct proportion, solely because of utilizing an inefficient design architecture that is not suited for the specific application.
Compounding the complexity, inefficiency and unreliability of PC architectures is the sometimes irregular nature of digital signal data during real-time transmissions. An example of such irregular digital signal data is MPEG digital video “packet” data where the ‘valid data or content’ in each packet is of varying length and consequently must be compensated with ‘null data packets’ to achieve uniform digital signal timing for transmission. Since generic PC architectures must transform any and all input digital signal data into a common format compatible to its inherent architecture, both invalid data and null data are committed to digital storage media without differentiation and digital signal timing must be appended through the use of supplemental specialized application layers. PC architectures can not be easily optimized for analyzing the unique real-time digital signal data “timing signatures” or timing/data artifacts without adding additional specialized application layers to the signal processing task.
Today's digital products, based upon PC architectures, must conform to the constraints edicted by the PC architectures. Taking any alternative design approach today to that of common PC architectural designs involves significant complexity since the PC architecture must provide common support to a great many applications that can be tremendously disparate in form and function. Consequently, PC architectures when applied to specific design applications for today's emerging digital products are complex, expensive and most importantly unreliable for many applications with narrow, well-defined operational requirements such as in the case with the PVR.
The few architectural design alternatives that attempt to address the aforementioned issues are “trimmed-down” variations of PC architectures, such as the Real-time Operating System (RTOS) and other similar embedded systems. These architectures do not provide a viable design solution for demanding digital products due to limited software operation and support. RTOS has a very narrow hardware focus, possess limited functionality, and is difficult to modify for specific applications—the antithesis of the PC architecture. Architectural designs of today's digital products utilizing RTOS or embedded systems are generally focused upon basic hardware applications requiring limited software support. Complex digital applications like the PVR are much too demanding upon the applications software requirements for the limited software functionality provided by RTOS to be a viable alternative. Most embedded architectures experience a similar dilemma.
Commercially available under such trade names as “TiVo” and “Replay”, PVR's are becoming well known in the consumer marketplace for providing exciting feature sets not found in analog, tape-based products like the VCR. The PVR's ability to leverage the capabilities of hard disk drives enhances consumer viewing experience by providing “time-shift” features to replay or record their favorite television programs while simultaneously viewing the programs live. This feature cannot be achieved using non-linear, analog, tape-based technologies.
Examples of PVR systems employing conventional PC architectures and similar modified techniques to different degrees may be seen in U.S. Pat. No. 6,233,889 and U.S. Pat. No. 5,371,551 and its Reissue No. Re36, 801. The '889 patent teaches a TV/MPEG time-warping system that is implemented with a PC architecture. Similarly, the '551 patent and Re36, 801 also employ PC architectures.
Today there is a steadily growing need to store and retrieve digital information in digital products for a variety of applications, but such digital products must be cost effective, efficient, reliable, and have a minimalist architectural design to be successfully adopted by the marketplace. Viable alternative architectures for these digital products must provide the benefits without the liabilities of both PC and embedded architectures.
Thus, a hitherto unsolved need exists for an apparatus and method that can translate native digital signal data in real-time into an optimized data storage format; utilize digital storage media without subscribing to PC architectural requirements; preserve the unique characteristics of the original format of any type of digital signal data; and restore the translated digital signal data back to it's native format upon retrieval with minimal architectural complexity.